How HFT shops shave nanoseconds: cut-through switching, the latency budget, kernel bypass, and how you prove it.
Trading interviews probe one core idea from many angles: in this world the metric is time, not throughput. A market-data update or an order is a tiny packet; what matters is how few nanoseconds elapse between a signal arriving on one wire and a reaction leaving on another, and how consistent that number is. Say this up front:
Bandwidth buys you capacity; latency buys you the trade. A firm will happily run a 10G link at 2% utilization if it means the switch forwards each frame 300 ns sooner and never queues. The whole design collapses to one goal: minimize per-packet latency and its jitter, end to end, and be able to measure it to the nanosecond.
Every switch has to decide when it may start transmitting a frame out the egress port relative to how much of it has arrived on ingress. That single decision is the biggest lever a switch vendor has over latency.
The classic behavior: the switch buffers the entire frame, computes the CRC and compares it against the FCS in the trailer, and only then looks up the destination and forwards. Consequences:
The switch reads just enough of the header to make a forwarding decision — the destination MAC, the first 6 bytes after the preamble — and immediately begins streaming the frame out the egress port while the tail is still arriving. Consequences:
A compromise mode: the switch waits for the first 64 bytes before forwarding. Since Ethernet collisions only happen within the first 64 bytes (the minimum frame / slot time), any collision-induced runt is caught and dropped, while you still avoid buffering the whole frame. Largely historical now (collisions vanished with full-duplex switching) but a common interview name-drop.
| Property | Store-and-forward | Fragment-free | Cut-through |
|---|---|---|---|
| Bytes read before forwarding | whole frame | first 64 B | ~first 6 B (dst MAC) |
| Latency vs frame size | grows with size | fixed ~64 B wait | ~constant, minimal |
| FCS checked before forward? | yes | no (only length) | no |
| Forwards corrupt frames? | no | collision runts caught | yes (counted, not blocked) |
| Speed / MTU mismatch | handles it | limited | forces S&F fallback |
| Typical use | enterprise, WAN edge | legacy | HFT / trading fabric |
Three reasons, stated plainly:
End-to-end latency is a sum of independent components. Being able to name them and say which one dominates in a given scenario is the single most-tested skill here.
| Component | What it is | How to compute / rule of thumb | How to reduce |
|---|---|---|---|
| Serialization | Time to clock the frame's bits onto the wire, one at a time. | frame_bits / link_speed. 1500 B @ 10G ≈ 1.2 µs; 64 B @ 10G ≈ 51 ns; same 64 B @ 100G ≈ 5 ns. |
Smaller frames, faster links. |
| Propagation | Time for the signal to physically travel the distance. | ~5 µs per km in fiber (light in glass ≈ 200,000 km/s, ~2/3 of c). Distance-bound, unavoidable. | Shorter path → colocation; straighter path; air beats glass (microwave). |
| Switching / forwarding | Time inside the device to read the header and make the decision. | Cut-through ASIC: ~300–500 ns/hop; L1 switch: ~5 ns; store-and-forward: +full serialization. | Cut-through / L1 switches, fewer hops. |
| Queuing / buffering | Time a frame waits behind others for a busy egress port. | The big variable — zero when idle, unbounded under congestion/microbursts. Source of jitter. | Headroom, shallow buffers, priority for market data, avoid oversubscription. |
| Host / NIC / stack | Time from wire → application and back, inside the server. | Kernel stack: single-digit µs; kernel bypass: hundreds of ns; FPGA NIC: tens of ns. | Kernel bypass, busy-poll, CPU pinning, FPGA offload. |
Speed-of-light-in-fiber rule of thumb: ~5 µs per kilometer, each way (~1 µs per 200 m). A 100 km round trip is ~1 ms you can never get back with any switch — which is exactly why proximity/colocation, not gear, wins the long-distance game.
The interview move: given a topology, decompose the latency and identify the dominant term. Across a data center hall, switching + host dominate and gear choice matters. Between two cities, propagation dominates and only the path (fiber vs microwave, km of route) matters — a faster switch is noise.
Market-data ticks and order messages are tiny — often 40–100 bytes of payload. A book update, a new order, a cancel: all small. This reshapes what you optimize for.
Half the latency budget is often inside the server, before a byte reaches the network. The standard Linux path — interrupt → softirq → kernel stack → socket → copy to user — costs single-digit microseconds and is jittery. HFT hosts bypass most of it.
| Technique | What it does | Why it helps |
|---|---|---|
| Kernel bypass | App talks to the NIC directly in user space: DPDK, Solarflare/Xilinx Onload (transparent sockets), RDMA/RoCE, ef_vi, io_uring/AF_XDP. | Removes syscalls, context switches, and kernel-stack traversal from the hot path — µs → hundreds of ns. |
| Busy-polling | A pinned core spins reading the NIC descriptor ring instead of waiting for an interrupt; disable interrupt coalescing (ethtool -C … rx-usecs 0). | Interrupts and coalescing trade latency for CPU efficiency — the wrong trade here. Polling eliminates interrupt-delivery latency and jitter. |
| Hardware timestamping | NIC stamps each packet in silicon (PHY/MAC) on RX and TX. | Nanosecond-accurate, jitter-free timing for measurement and for PTP — software clocks are too coarse and noisy. |
| CPU pinning / NUMA | Pin the trading thread and NIC IRQs to cores on the same NUMA node as the NIC's PCIe root; isolate cores (isolcpus, nohz_full). | Avoids cross-socket QPI/UPI hops and cache misses; stops the scheduler from migrating the hot thread. |
| Disable power saving | Turn off C-states/P-states, EEE (Energy-Efficient Ethernet, 802.3az), and frequency scaling; lock to max clock. | Wake-from-idle transitions add microseconds of unpredictable latency to the first packet after quiet — deadly for bursty market data. |
| TCP / socket tuning | TCP_NODELAY (kill Nagle), tuned buffers, SO_BUSY_POLL, huge pages, pre-faulted memory. | Nagle batches small writes — exactly the wrong behavior for tiny order messages. Remove anything that delays a small send. |
| Avoid the kernel on the hot path | Keep the market-data / order path entirely in user space or on the NIC; leave the kernel stack for control/admin traffic only. | The kernel is a shared, preemptible, jittery resource — you want the hot path deterministic. |
# Kill interrupt coalescing and offloads that add/hide latency on the hot NIC
ethtool -C eth0 rx-usecs 0 tx-usecs 0 adaptive-rx off adaptive-tx off
ethtool --set-eee eth0 eee off # disable Energy-Efficient Ethernet
ethtool -K eth0 gro off lro off # no aggregation on the RX path
# Pin the NIC's IRQ and the trading thread to a core on the NIC's NUMA node
cat /sys/class/net/eth0/device/numa_node
taskset -c 4 ./trader # isolcpus=4 nohz_full=4 in cmdline
# Kernel: latency-oriented tuning
cpupower frequency-set -g performance # lock max freq, no P-state ramp
# BIOS: C-states disabled, Turbo/uncore locked, hyperthreading off on hot cores
Purpose-built cut-through switches quote deterministic sub-microsecond port-to-port latency: Arista's 7130 / Metamako line, the low-latency Cisco Nexus models, and similar. They strip features to the minimum and forward on the destination MAC as it arrives.
The extreme end: a Layer-1 switch is effectively a programmable, electronic patch panel — it cross-connects physical ports at the PHY with no packet parsing at all, giving ~5 nanosecond latency. Used for fan-out/replication of a market-data feed to many consumers, for taps, and for A/B failover — because it adds essentially nothing to the budget. The trade-off: no L2/L3 intelligence, it just moves bits.
For the truly latency-critical path, logic runs in an FPGA on a SmartNIC (or an FPGA switch). Feed parsing, order-book building, risk checks, and even the trigger-to-order reaction happen in gates in tens of nanoseconds, never touching a CPU or the kernel. This is "tick-to-trade" in hardware.
(S,G) and the tree is built with PIM-SSM, no shared tree or RP needed. Feeds are sent as
two independent A/B streams over disjoint paths; the consumer arbitrates by sequence
number, filling a gap on A from B without waiting for a retransmit. This is how you get lossless,
low-latency fan-out to thousands of subscribers. See
PIM-SM / SSM session for the
multicast mechanics and
Life of a Packet — Advanced
for the multicast forwarding walkthrough.Between distant venues (e.g. Chicago↔New York, or across Europe), the winner is microwave / millimeter-wave radio, not fiber. Two reasons, both physics:
The catch, and the reason fiber still exists on these routes: microwave is low-bandwidth (you send only the most valuable signals — top-of-book, a few symbols) and weather-sensitive (rain fade), so firms run microwave for the latency-critical trigger and fiber as the high-capacity, all-weather backup.
You can't optimize what you can't measure, and in this world "measure" means nanoseconds with proof. The techniques form a hierarchy of trustworthiness.
| Method | Resolution | Trust | Notes |
|---|---|---|---|
Software timestamps (app / kernel clock_gettime) | µs, noisy | low | Includes scheduler jitter, syscall cost, and clock error — measures your host as much as the network. Insufficient for HFT. |
| NIC hardware timestamps | ns | high | Stamped in the PHY/MAC on the wire, before any software touches the packet. The baseline for host-side measurement. |
| PTP (IEEE 1588) | sub-µs to ns | high | Synchronizes clocks across devices so timestamps taken at different points are comparable end to end. Use HW-timestamped boundary/transparent clocks. |
| Passive tap + capture | ns | highest | An optical/L1 tap copies the wire to a capture appliance (e.g. a timestamping FPGA) that stamps independently — ground truth, not the device under test's own claim. |
Key points to make: